Investigation of Tm<sub>2</sub>O<sub>3</sub><SUP> </SUP>as a Gate Dielectric for Ge MOS Devices



Zurauskaite, L, Jones, L, Dhanak, VR, Mitrovic, IZ, Hellstrom, PE and Ostling, M
(2018) Investigation of Tm<sub>2</sub>O<sub>3</sub><SUP> </SUP>as a Gate Dielectric for Ge MOS Devices. SIGE, GE, AND RELATED COMPOUNDS: MATERIALS, PROCESSING, AND DEVICES 8, 86 (7). pp. 67-73.

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Abstract

In this work atomic layer deposited TnOj has been investigated as a high-k dielectric for Ge-based gate stacks. It is shown that when Tm203 is deposited on high-quality Ge/Ge02 gates, the interface state density of the gate stack is degraded. A series of post-deposition anneals are studied in order to improve the interface state density of Ge/GeO/TmjOs gates, and it is demonstrated that a rapid thermal anneal in O2 ambient can effectively reduce the interface state density to below 5-10" cmeV1 without increasing the equivalent oxide thickness. Fixed charge density in Ge/GeOx/Tm20j gates has also been investigated, and it is shown that while O2 post-deposition anneal improves the interface state density, the fixed charge density is degraded.

Item Type: Article
Additional Information: Q. Liu, J. M. Hartmann, A. Thean, S. Miyazaki, A. Ogura, X. Gong, M. Caymax, A. Schulze, G. Masini, A. Mai, M. Ostling, G. Niu, D. L. Harame
Uncontrolled Keywords: 40 Engineering, 4008 Electrical Engineering, 4017 Mechanical Engineering, 4018 Nanotechnology
Depositing User: Symplectic Admin
Date Deposited: 23 Jan 2019 15:55
Last Modified: 20 Jun 2024 23:06
DOI: 10.1149/08607.0067ecst
Related URLs:
URI: https://livrepository.liverpool.ac.uk/id/eprint/3030700